【3月上旬】新鮮出爐！一起來“瓜分”這些矽谷高薪職位

IntelliPro Group

Founded in 2009，IntelliPro Group has been helping more than 100,000 talents to advance their careers and serving as top human resource partner for clients in the technology industry in the U.S. and APAC region.

By levering machine learning，article intelligence，big data，and network effects，IntelliPro Group has built its database with more than 160 million profiles for talent matching.

IntelliPro delivers an integrated talent solution, from full time employment, staffing, HR consulting to project outsourcing to better serve both parties in the talent marketplace.

本期精選崗位

編碼

職位名稱

工作地點

7310

Backend Software Engineer

San Francisco

7320

Data Stack Software/Firmware/System Engineer

PA or SD

7298

Engineer, AI Framework

San Jose

7297

Image Scientist

San Jose

7296

Engineer, Design Verification

San Jose

7295

Senior Engineer, FPGA

San Jose

2154

Senior Firmware Engineer

San Jose

1607

Engineer, ASIC Design

San Jose

6795

Technical Lead for Mechanical/Thermal Engineering

San Jose

7260

Senior Research Engineer/Lead – Map Content

San Diego

/Bay Area

1. Backend Software Engineer

Position Code：7310

Location：San Francisco

Responsibilities:

You will be part of a small team, with a large amount of ownership and autonomy for managing things directly.
You will work closely with product managers, other teams, and both internal and external stakeholders, owning a large part of the process from problem understanding to shipping the solution.
You will ship high quality, scalable and robust solutions with a sense of urgency.
You will have the freedom to suggest and drive organization-wide initiatives.

Role Requirements:

Self-motivation and an enjoyment for a startup environment.
A strong sense of ownership.
Strong knowledge of common back-end Web technologies (such as Ruby on Rails, Python, etc.) in a production environment.
An ability to balance a sense of urgency with shipping high quality and pragmatic solutions.
Experience working with a large codebase on a cross functional team.
Strong knowledge of SQL.
Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering OR equivalent work experience.
7+ years of working experience in a similar field/environment.

2.Data Stack Software/Firmware/System Engineer

Position Code：7320

Location： PA or SD

Responsibilities:

In a multi-site project team, you will work on 4G/5G NR modem protocol and data stack development. Your responsibilities may include:

Data stack architecture design, systems requirement, algorithm, and simulation.
Data stack systems and software design, development and integration.
Work with the ASIC/HW team on the HW and SW interworking of the data plane. Provide specifications to the ASIC/HW and SW engineers for the design.
Data plane embedded software and microcontrollers design, development and integration.
Data plane component design, including MAC layer, RLC layer, PDCP layer and TCPIP layer.
Data plane implementation of baseband processing.
Data plane integration and testing with hardware.
Work with verification team for test plan and function coverage.

Role Requirements:

Experience with the wireless data stack layers architecture design, development and integration:

Experience with Hw-Sw interworking and real-time embedded sw skills.
Experience with data stack implementation. Strong C/C++ programming skills.
Experience with one or more of the following areas: LTE, NR, WCDMA, Wi-fi, WLAN, CDMA, in data stack design, development and integration.
Experience with any data stack protocols, including MAC, RLC, PDCP and TCP/IP layers.
Experience with any packet data processing algorithms.

3.Engineer, AI Framework

Position Code：7298

Location：San Jose

Responsibilities:

Design and develop software libraries to support quantization-aware training (QAT) that is compatible with BST’s SoC with the TensorFlow and PyTorch development frameworks.
Validate QAT library with model-training testing, and evaluation of performance against model baseline.
Develop user documentations with developer’s guide and sample code.

Role Requirements:

Master's degree in Computer Engineering or related fields.
2+ years of professional project experience.
Solid programming skills, and excellent in Python programming.
Experience with python unit tests/functional tests and integration tests
Passionate about writing clean, testable, and production-ready code.
Excellent written and verbal communication skills, presentations skills, and the ability to work with cross-functional teams.

4.Image Scientist

Position Code：7297

Location：San Jose

Responsibilities:

Research cutting edge imaging applications.
Contribute to improving existing ISP and 3A solutions.
Prototype computer vision algorithms for novel ISP functionalities.
Deploy optimized hardware-friendly production code.
Cooperate with image quality team on quality tuning and testing.
Write algorithm documentation and performance evaluation report.

Role Requirements:

Masters or PhD in Computer Science, Electrical Engineering, Imaging Science, or related field.
Experience in camera algorithm design of image processing, computational photography, and computer vision.
Understanding of novel imaging algorithms of HDR, Super resolution, 3A, multi-camera fusion.
Familiar with ISP architecture and individual modules.
Excellent coding skills in C++/Python and TensorFlow/PyTorch.
Hands-on experience in ISP and multi-frame/multi-camera algorithms a plus.
Hands-on experience in machine learning or deep learning algorithm development on mobile platforms a plus.

5.Engineer, Design Verification

Position Code：7296

Location：San Jose

Responsibilities:

Working with design engineers to generate models for digital functional verification.
Functional verification planning and test-plan development.
Triage and debug of design failures, coverage development and closure.
Stimulus generation including directed and constrained random test generation.
Regression debug support and infrastructure development.

Role Requirements:

2+ years of Design Verification work experiences.
Master degree or above in Electrical Engineering or similar disciplines.
Skilled with SystemVerilog and Design Verification methodologies such as UVM, OVM.
Experience working with industry standard design verification EDA tools like VCS, MTI etc.
Experience with digital verification using real number models in SystemVerilog.

6.Senior Engineer, FPGA

Position Code：7295

Location：San Jose

Responsibilities:

Develop emulation tools, workflows and infrastructure in collaboration with RTL, verification, validation and SW teams for productivity during debug, runtime, and data analysis of results from emulation runs.
Develop emulation/FPGA environment in System Verilog and/or C/C++.
Deliver emulation and prototyping models from RTL on industry standard emulation and prototyping platforms.
Build and execute emulation test plan to ensure quality of the models and assist pre-silicon validation.
Drive emulation methodologies for HW verification and SW development.

Role Requirements:

2+ years of Emulation/FPGA work experiences with Master degree with Major in EE.
Experience with SystemVerilog and C++ to model RTL components and transactors.
Experience with post-silicon bring up, debug and reproducing issues on emulator/FPGA.
Experience with emulation platforms such as; Palladium, Veloce, or Zebu, as well as FPGA prototyping.
Experience working with industry standard design verification EDA tools like VCS, MTI etc.

7. Senior Firmware Engineer

Position Code：2154

Location：San Jose

Responsibilities：

Develop kernel function to accelerate typical deep learning operations in our custom NN acceleration platform.
Develop firmware to deploy NN models in our hardware platform.
Analyze the deployed model accuracy/precision in both application-level and bit-level.
Analyze the hardware performance and tune firmware to achieve highspeed and low-power.

Role Requirements:

MS or PhD degree in Computer Science, Computer Engineering, Electrical Engineering or related field.
Familiar in low level C/C++ programming.
Experience with deep learning and/or computer vision algorithms implementation and acceleration, including at least one of the following but not limited to DSP, Open CL, CUDA, or Neon.
Knowledge of python programming and computer architecture.
Knowledge of machine learning frameworks: Caffe, Tensorflow, Pytorch, Scikit-learn, etc.
Knowledge of one or more of the following: Microcontrollers, SoC, FPGA, hardware bring up, ARM processors, performance optimization, bootloading, firmware, and hardware/software integration.

8. Engineer, ASIC Design

Position Code：1607

Location：San Jose

Responsibilities:

Develop micro-architecture from given architecture and algorithms.
RTL design, verification and integration.
Synthesis and optimize for timing, area and power.
Module and top-level documentation.
Work with architecture and software teams to develop next-generation silicon.

Role Requirements:

MS with at least three year's equivalent experience preferred.
Fluent with HDL languages (Verilog, SystemVerilog).
Experience in GPU, AI accelerator, RISCV, microcontroller a plus.
Familiar with scripting languages like Python, Perl or C/C++.
Familiar with EDA tools and CAD flow.
Good documentation and communication skill.

9.Technical Lead for Mechanical/Thermal Engineering

Position Code：6795

Location：San Jose

Responsibilities:

Define scalable neural network development tools to enable effective mapping and optimization of network models developed on common NN frameworks towards BST AI SOCs.
Develop automated model conversion flow that are user friendly and generic, suitable for most common models end user might create.
Develop tools to retarget various hardware architecture supported by BST AI SOCs, CONV, GEMM, EDP, DSP.
Develop tool flow to support post-training quantization and quantization w/wo retraining.
Develop tool flow to automate optimization search process.
Develop and execute moderately complex test plans, including software functionality, integrity, and security based on industry tools and practices, departmental guidance and policies.

Role Requirements:

Master or PhD degree with a focus in Engineering (Computer Science, Computing Engineering，Electrical Engineering, Mathematics, Physics or related field), or BS with 5+ years of experience.
Deep understanding of computer architecture and general knowledge of neural network computation challenges.
Experience using or developing deep learning frameworks, such as TensorFlow, PyTorch, ONNX, Caffe, etc. Familiar with internal data representation and APIs of at least one framework.

10.Senior Research Engineer/Lead – Map Content

Position Code：7260

Location：San Diego/Bay Area

Responsibilities:

Deliver high-quality and product-level code for modules on autonomous driving trucks.
Formulate ill-defined problems with data driven approach for autonomous trucks driving.
Be responsible for design, implementation, and evaluation of the cutting edge and sophisticated algorithms.
Work on different sensors such as camera, LiDAR, radar, GNSS/IMU and etc.
Experience non-linear optimization algorithms and non-convex problem.
Collaborate with other engineers to conduct system integration and tests.
Provide relative poses of various sensors in millimeter and <0.1 degree resolution.
Real-time correction of sensor pose due to roughness of the truck while driving.
Develop centimeter-accuracy ego localization even when GPS is out of service.
Benchmark of algorithms to ensure their performance for agile development.

Role Requirements:

MS in Computer Science, Computer Vision, Machine Learning, Robotics, Math/Statistics or other related fields.Product-quality coding skill in Python or C/C++.
Solid knowledge and insight understanding of at least one of the following domains:

1. Computer vision: feature extraction/matching, SLAM, SfM, VO/VIO, multi-view geometry;

2. Point cloud: feature extraction, registration, (un)distortion;

3. State estimation: Bayesian modeling, signal process, KF/EFK, factor-graph, non-linear optimization, statistical sampling.

申請以上職位

以上如有你心儀的職位

請按照以下方式投遞簡歷至郵箱

郵箱地址：[email protected]

郵件標題註明：職位編碼+職位名稱+姓名